Director Yield Enhancement - Boise Idaho

Company: Micron Technology
Location: Boise, Idaho
Posted On: 03/27/2026

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron plans to invest more than $150 billion globally over the next decade in groundbreaking manufacturing and R&D, including fab expansion in the United States giving us the opportunity to bring in passionate team members to help us continue to be at the forefront of memory in the World. Micron has an outstanding opportunity for a high energy, tenacious, ambitious, result driven individual with a strong work ethic and integrity to join our Facilities Team in Boise, Idaho. As the Director Yield Enhancement (YE), you are responsible for hiring talent to build the ID1 YE team including Yield Analysis, Failure Analysis and YE lab. This position’s responsibility for leading YE team to successfully yield ramp up, maintain the ID1 product yield. Also drive the quality improvement to meet best-in-class yield, quality. Responsibilities : • Work with Micron Global Leadership Teams to define and drive business goals to meet corporate objectives. • Drive effective DRAM technology transfer from TD or other HVM fabs. • Drive effective process technology improvement that enables best-in-class yield, quality, and cost. • Coordinate resource planning and milestones with sending and receiving sites to ensure business plans are met. • Define clear goals and strategic initiatives to drive site performance to best-in-class yield, quality, cost, and output. • Collaborate with HVM, ADT, TD, Central Teams, other Fabs, and external groups to support overall needs and objectives of the Fab. • Collaborate with Central teams and other Fabs to drive for standardization and BKM practices across From End network to enable DRAM Central of Excellence. • Provide technical mentorship and support Manufacturing Engineering, and Quality Engineering teams in driving preventive and corrective actions for internal and external quality and product issues. • Oversee career development of PIE team through the area leadership and ensure succession plans for all key department positions. • Manage team staffing and succession, prioritize work, remove barriers, and drive for accountability. • Empower team members, promote teamwork, distribute work and learning opportunities, and provide a line of sight to strategic objectives. Minimum Qualifications: • Senior level (10 years) experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Design, or Unit Process Development • Possess a deep understanding of the DRAM process flow. • Demonstrated experience overseeing an engineering team (5 direct reports) • Success in resolving sophisticated issues. • Think and communicate clearly in urgent and stressful situations. Preferred Qualifications • Previous experience in DRAM including TD, HVM, and transfer team. Other memory technology or logic/foundry experience will be considered. • Experience working in a 300mm Semiconductor Facility • Experience managing a globally distributed organization More...

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