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Engineer II - FPGA Verification - Westminster Colorado
Company: Disability Solutions Location: Westminster, Colorado
Posted On: 05/03/2024
Job Description US CITIZENSHIP REQUIREDThe Engineering, Science and Analysis (ESA) Strategic Capabilities Unit comprises the technical talent and organizational leadership that enables the successful delivery of high-impact discriminating technologies for our customers' missions. Our collaborative, cross-functional teams are committed to innovation, integrity, continual learning and strong execution.What You'll Do: - Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems.
- Work in a fast-paced team environment on a variety of R&D, proof of concept, and production programs.
- Verify FPGA designs (including SOC architectures utilizing soft-core processors, digital filters, image processing algorithms, and communication interfaces/protocols), design and implement test benches for both unit level and system level environments and create reusable verification environments that can be used across multiple projects.
- Work in a System Verilog/UVM environment developing tests, testbenches, UVM components, and regressions/testlists.
- Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix.
- Work collaboratively and in tandem with system architects, FPGA design engineers and embedded software engineers.
- Maintain a regular and predictable work schedule.
- Establish and maintain effective working relationships within the department, the Strategic Business Units, Strategic Capabilities Units and the Company. Interact appropriately with others in order to maintain a positive and productive work environment.
- Perform other duties as necessary.On-Site Work Environment: This position requires regular in-person engagement by working on-site five days each normally scheduled week in the primary work location. Travel and local commute between company campuses and other possible non-company locations may be required.Working Conditions:
- Work is performed in an office, laboratory, production floor, or cleanroom, outdoors or remote research environment.
- May occasionally work in production work centers where use of protective equipment and gear is required. May access other facilities in various weather conditions.Required Education, Experience, & Skills
- BS degree or higher in Engineering or a related technical field is required plus 5 or more years related experience. Each higher-level degree, i.e., Master's Degree or Ph.D., may substitute for two years of experience. Related technical experience may be considered in lieu of education. Degree must be from a university, college, or school which is accredited by an agency recognized by the US Secretary of Education, US Department of Education.
- Solid FPGA/ASIC Verification development methodology.
- Experience with System Verilog and UVM, and familiarity with electronic circuit design and electronic systems.
- A solid understanding of object-oriented concepts and experience designing class-based constrained random test benches.
- Experience with coverage writing (including coverpoints, crosses), coverage collection and improving coverage of the design under test.
- Ability to develop specifications, cost, schedule, and resource requirements for FPGA or ASIC verification plans.
- Good communication skills, as well as excellent presentation skills.Preferred Education, Experience, & Skills
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