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Principal PHY/MAC RTL Design Engineers - San Jose California
Company: InnoPhase IoT
Location: San Jose, California
Posted On: 05/07/2024
In this role you will be implementing MAC, PHY algorithms for industry best low power IoT connectivity devices. These devices deliver next generation connectivity technologies at lowest power consumption. You will work with highly motivated team members across various cross functional groups such as RF & baseband systems, and firmware.
Roles & Responsibility
- You will develop expert understanding of short-range wireless technologies such as Wi-Fi, Bluetooth, Zigbee, 15.4.
- You will develop requirements specifications for various MAC/PHY function from Standards and related specifications.
- You will work closely with System group to understand fixed point implementation of various algorithms.
- You will create micro-architecture specification, implement in Verilog/Systemverilog, verify various MAC/PHY algorithms to meet the requirements.
- You will call for periodic review and present your work for wider audience.
- You will pay special attention to low power aspects of your design/implementation.
- You will work with ASIC/FPGA implementation team to meet all the sign-off criteria.
Skills
- Expert level in RTL coding, verification and debugging using EDA tools.
- Working knowledge in fixed point RTL implementation.
- Experience in digital design & implemention of signal processing and/or PHY/MAC algorithms for 802.11 WLAN or similar technologies.
- Experience in SoC architecture, bus protocols such as AMBA and peripherals.
- Experience in low power design techniques.
- Familiarity with ASIC/FPGA implementation flow and debug.
Qualifications
- BS/MS/Ph.D. in EE or related.
- Prior experience in 802.11ax/be or such wireless PHY implementation is required.
- Experience:
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