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Avionics FPGA Design and Verification Chief Principal Engineer - Villa Park California
Company: BOEING Location: Villa Park, California
Posted On: 04/24/2024
Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing is currently looking for an Avionics FPGA Design and Verification Chief Engineer at the Principal level to join our team in Hazelwood MO, Plano TX, or Long Beach CA. The successful candidate will be responsible for leading the technical development of a distributed group of engineers focused on FPGA Design, Verification, and Certification for Boeing AvionX products.This position involves technical leadership for a team that develops FPGA solutions for Vehicle Management Systems (VMS), Guidance and Control Units, Computing and Network Infrastructure, and Electrical Power Systems products. - These products are used in many Boeing products such as F-15 Fighter, T-7A Trainer, MQ-25 Autonomous Refueler, Weapons Programs, Commercial Aircraft, and many more.Position Responsibilities: - Lead FPGA designs, including multi-FPGA programs and teams with design and verification engineers, and manage team execution to meet program milestones
- Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs
- Explore trade-space of potential FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance
- Implement FPGA with latest design practices and tools from block-level microarchitecture and through HDL coding
- Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensurethe design is completed on schedule
- Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
- Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards
- Drive FPGA-based prototyping and validation depending on program and system requirements and complexity
- Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed
- Train and mentor less senior engineers across the department and help build effective project teamsThis position is expected to be 100% onsite. - The selected candidate will be required to work onsite at one of the listed location options. -This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship.Basic Qualifications (Required Skills/Experience):
- Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry
- 10 or more years of professional experience with Hardware-based integration and test of ASIC/FPGA designs
- 10 or more years of educational and/or work experience working with digital ASIC/FPGA design and verificationPreferred Qualifications (Desired Skills/Experience):
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