Senior Mask Layout Design Engineer - Santa Clara California

Company: NVIDIA Corporation
Location: Santa Clara, California
Posted On: 04/20/2024

Senior Mask Layout Design Engineer page is loaded Senior Mask Layout Design Engineer Apply locations US, CA, Santa Clara time type Full time posted on Posted 30+ Days Ago job requisition id JR1968725 Are you interested in joining our Dynamic team? We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify human creativity and intelligence.What you'll be doing:

• Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools
• You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
• Job duties will include floor planning, custom layout and verifying against design rules and schematics.What we need to see:
  • Hold a BSEE or equivalent experience. MSEE is a plus.
  • Minimum of 8+ years of relevant mask design / layout experience
  • Tape-out experience with FinFET technology is required. Experience with TSMC N5/N4/N3 is preferred.
  • Experience with high-speed SerDes/RF layout design is helpful.
  • Experience with top level integration would be phenomenal to have.
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies
  • Validated experience with Cadence custom circuit design tools - particularly virtuoso
  • Experience running and debugging DRC and LVS with verification tools such as ICV/Calibre
  • Ability to work effectively in a team, good interpersonal skills and positive energy.
  • Proficiency in scripting languages like perl, python, skill etc. is a plus
  • Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decksThe base salary range is $124,000 - $230,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. You will also be eligible for equity and benefits . NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. Similar Jobs (5) Senior Mask Layout Design Engineer locations US, CA, Santa Clara time type Full time posted on Posted 30+ Days Ago Senior Mask Layout Design Engineer locations US, CA, Santa Clara time type Full time posted on Posted 5 Days Ago About Us 0:00 -/ - 3:32 NVIDIA is a Learning Machine NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and the metaverse is transforming the world's largest industries and profoundly impacting society. Learn more about NVIDIA .
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